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MCP1406/07
6A High-Speed Power MOSFET Drivers
Features
* High Peak Output Current: 6.0A (typ.) * Low Shoot-Through/Cross-Conduction Current in Output Stage * Wide Input Supply Voltage Operating Range: - 4.5V to 18V * High Capacitive Load Drive Capability: - 2500 pF in 20 ns - 6800 pF in 40 ns * Short Delay Times: 40 ns (typ.) * Matched Rise/Fall Times * Low Supply Current: - With Logic `1' Input - 130 A (typ.) - With Logic `0' Input - 35 A (typ.) * Latch-Up Protected: Will Withstand 1.5A Reverse Current * Logic Input Will Withstand Negative Swing Up To 5V * Pin compatible with the TC4420/TC4429 devices * Space-saving 8-Pin SOIC, PDIP and 8-Pin 6x5 DFN Packages
General Description
The MCP1406/07 devices are a family of buffers/MOSFET drivers that feature a single-output with 6A peak drive current capability, low shoot-through current, matched rise/fall times and propagation delay times. These devices are pin-compatible and are improved versions of the TC4420/TC4429 MOSFET drivers. The MCP1406/07 MOSFET drivers can easily charge and discharge 2500 pF gate capacitance in under 20 ns, provide low enough impedances in both the on and off states to ensure the MOSFETs intended state will not be affected, even by large transients. The input to the MCP1406/07 may be driven directly from either TTL or CMOS (3V to 18V). These devices are highly latch-up resistant under any conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking (of either polarity) occurs on the ground pin. All terminals are fully protect against Electrostatic Discharge (ESD) up to 4 kV. The MCP1406/07 single-output 6A MOSFET driver family is offered in both surface-mount and pinthrough-hole packages with a -40C to +125C temperature rating, making it useful in any wide temperature range application.
Applications
* * * * Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Motor and Solenoid Drive
Package Types
MCP1407 MCP1406 MCP1406 MCP1407 5-Pin TO-220 Tab is Common to VDD
8-Pin PDIP/SOIC VDD 1 INPUT 2 NC 3 GND 4
8-Pin 6x5 DFN VDD INPUT NC GND 8 1
8 VDD VDD 7 OUT OUT 6 OUT OUT 5 GND GND
VDD
VDD
12345
OUT OUT OUT OUT GND GND
INPUT GND VDD GND OUT
Note 1: Duplicate pins must both be connected for proper operation. 2: Exposed pad of the DFN package is electrically isolated.
2 3 4
7 6 5
(c) 2006 Microchip Technology Inc.
DS22019A-page 1
MCP1406/07
Functional Block Diagram(1)
Inverting 130 A 300 mV Output Output Non-inverting 4.7V MCP1406 Inverting MCP1407 Non-inverting VDD
Input Effective Input C = 25 pF GND
Note 1: Unused inputs should be grounded.
DS22019A-page 2
(c) 2006 Microchip Technology Inc.
MCP1406/07
1.0 ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
Supply Voltage ................................................................+20V Input Voltage ............................... (VDD + 0.3V) to (GND - 5V) Input Current (VIN>VDD)................................................50 mA
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = +25C, with 4.5V VDD 18V. Parameters Input Logic `1', High Input Voltage Logic `0', Low Input Voltage Input Current Input Voltage Output High Output Voltage Low Output Voltage Output Resistance, High Output Resistance, Low Peak Output Current Continuous Output Current Latch-Up Protection Withstand Reverse Current Switching Time (Note 1) Rise Time Fall Time Delay Time Delay Time Power Supply Supply Voltage Power Supply Current Note 1: 2: 3: VDD IS IS 4.5 -- -- -- 130 35 18.0 250 100 V A A VIN = 3V VIN = 0V tR tF tD1 tD2 -- -- -- -- 20 20 40 40 30 30 55 55 ns ns ns ns Figure 4-1, Figure 4-2 CL = 2500 pF Figure 4-1, Figure 4-2 CL = 2500 pF Figure 4-1, Figure 4-2 Figure 4-1, Figure 4-2 VOH VOL ROH ROL IPK IDC IREV VDD - 0.025 -- -- -- -- 1.3 -- 1.5 -- -- -- 2.1 1.5 6 -- 0.025 2.8 2.5 -- V V A A A DC Test DC Test IOUT = 10 mA, VDD = 18V IOUT = 10 mA, VDD = 18V VDD = 18V (Note 2) Note 2, Note 3 Duty cycle 2%, t 300 sec. VIH VIL IIN VIN 2.4 -- -10 -5 1.8 1.3 -- -- -- 0.8 10 VDD+0.3 V V A V 0V VIN VDD Sym Min Typ Max Units Conditions
Switching times ensured by design. Tested during characterization, not production tested. Valid for AT and MF packages only. TA = +25C
(c) 2006 Microchip Technology Inc.
DS22019A-page 3
MCP1406/07
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD 18V. Parameters Input Logic `1', High Input Voltage Logic `0', Low Input Voltage Input Current Input Voltage Output High Output Voltage Low Output Voltage Output Resistance, High Output Resistance, Low Switching Time (Note 1) Rise Time Fall Time Delay Time Delay Time Power Supply Supply Voltage Power Supply Current Note 1: VDD IS 4.5 -- -- Switching times ensured by design. -- 200 50 18.0 500 150 V A VIN = 3V VIN = 0V tR tF tD1 tD2 -- -- -- -- 25 25 50 50 40 40 65 65 ns ns ns ns Figure 4-1, Figure 4-2 CL = 2500 pF Figure 4-1, Figure 4-2 CL = 2500 pF Figure 4-1, Figure 4-2 Figure 4-1, Figure 4-2 VOH VOL ROH ROL VDD - 0.025 -- -- -- -- -- 3.0 2.3 -- 0.025 5.0 5.0 V V DC TEST DC TEST IOUT = 10 mA, VDD = 18V IOUT = 10 mA, VDD = 18V VIH VIL IIN VIN 2.4 -- -10 -5 -- -- -- -- -- 0.8 +10 VDD+0.3 V V A V 0V VIN VDD Sym Min Typ Max Units Conditions
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V. Parameters Temperature Ranges Specified Temperature Range Maximum Junction Temperature Storage Temperature Range Package Thermal Resistances Thermal Resistance, 8L-6x5 DFN Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 5L-TO-220 JA JA JA JA -- -- -- -- 33.2 125 155 71 -- -- -- -- C/W C/W C/W C/W Typical four-layer board with vias to ground plane TA TJ TA -40 -- -65 -- -- -- +125 +150 +150 C C C Sym Min Typ Max Units Conditions
DS22019A-page 4
(c) 2006 Microchip Technology Inc.
MCP1406/07
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V.
120 100 Rise Time (ns) 80 60 40 20 0 4
100 pF
80
10,000 pF 8,200 pF 4,700 pF 2,500 pF 1,000 pF 6,800 pF
70 Fall Time (ns) 60 50 40 30 20 10 0
100 pF
10,000 pF
8,200 pF 1,000 pF 4,700 pF 2,500 pF 6,800 pF
6
8
10
12
14
16
18
4
6
8
10
12
14
16
18
Supply Voltage (V)
Supply Voltage (V)
FIGURE 2-1: Voltage.
80 70 Rise Time (ns) 50 40 30 20 10 0 100
5V
Rise Time vs. Supply
FIGURE 2-4: Voltage.
70 60
Fall Time vs. Supply
5V 10V
10V
Fall Time (ns)
60
50 40 30 20 10
15V
15V
1000 Capacitive Load (pF)
10000
0 100
1000 Capacitive Load (pF)
10000
FIGURE 2-2: Load.
30 Rise and Fall Time (ns) 25 20 15 10 5 0 -40 -25 -10 5
Rise Time vs. Capacitive
FIGURE 2-5: Load.
85 Propagation Delay (ns)
Fall Time vs. Capacitive
VDD = 18V
tRISE
VIN = 5V tD1
75 65 55 45 35
tFALL
tD2
20 35 50 65 80 95 110 125 Temperature ( C)
o
4
6
8
10
12
14
16
18
Supply Voltage (V)
FIGURE 2-3: Temperature.
Rise and Fall Times vs.
FIGURE 2-6: Supply Voltage.
Propagation Delay vs.
(c) 2006 Microchip Technology Inc.
DS22019A-page 5
MCP1406/07
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V.
200 Propagation Delay (ns) 175 150 125 100 75 50 25 2 3 4 5 6 7 8 9 10 Input Amplitude (V)
tD2 tD1
Quiescent Current (A)
VDD = 12V
250
VDD = 18V
200 150 100
Input = High
Input = Low
50 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature ( C)
o
FIGURE 2-7: Input Amplitude.
55 Propagation Delay (ns) 50 45 40 35 30 -40 -25 -10 5
Propagation Delay Time vs.
FIGURE 2-10: Temperature.
2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 4 6 8
Quiescent Current vs.
tD2
Input Threshold (V)
VDD = 18V VIN = 5V
VHI
VLO
tD1
20 35 50 65 80 95 110 125 Temperature ( C)
o
10
12
14
16
18
Supply Voltage (V)
FIGURE 2-8: Temperature.
180 Quiescent Current (A) 160 140 120 100 80 60 40 20 0 4 6 8
Propagation Delay Time vs.
FIGURE 2-11: Voltage.
2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1
Input Threshold vs. Supply
VDD = 12V
VHI
Input Threshold (V)
INPUT = 1
VLO
INPUT = 0
10
12
14
16
18
-40 -25 -10
5
20 35 50 65 80 95 110 125 Temperature ( C)
o
Supply Voltage (V)
FIGURE 2-9: Supply Voltage.
Quiescent Current vs.
FIGURE 2-12: Temperature.
Input Threshold vs.
DS22019A-page 6
(c) 2006 Microchip Technology Inc.
MCP1406/07
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V.
150
VDD = 18V
120
1 MHz
VDD = 18V
10,000 pF 6,800 pF
Supply Current (mA)
100 75 50 25 0 100
500 kHz 200 kHz 100 kHz
Supply Current (mA)
125
100 80 60 40 20 0
4,700 pF 100 pF 1,000 pF 2,500 pF
50 kHz
1000 Capacitive Load (pF)
10000
10
100 Frequency (kHz)
1000
FIGURE 2-13: Capacitive Load.
150 Supply Current (mA) 125 100
Supply Current vs.
FIGURE 2-16: Frequency.
80
Supply Current vs.
VDD = 12V
2 MHz
Supply Current (mA)
1 MHz
70 60 50 40 30 20 10 0
VDD = 12V
10,000 pF 6,800 pF 1,000 pF 4,700 pF 2,500 pF 100 pF
100 kHz
50 kHz
75 50 25 0 100
200 kHz 500 kHz
1000 Capacitive Load (pF)
10000
10
100 Frequency (kHz)
1000
FIGURE 2-14: Capacitive Load.
100 VDD = 6V 90 80 70 60 50 40 30 500 kHz 20 10 0 100
Supply Current vs.
FIGURE 2-17: Frequency.
40 35 Supply Current (mA) 30 25 20 15 10 5 0 10
Supply Current vs.
2 MHz 100 kHz 50 kHz
VDD = 6V
10,000 pF 6,800 pF 4,700 pF 1,000 pF 2,500 pF 100 pF
Supply Current (mA)
1 MHz
200 kHz
1000 Capacitive Load (pF)
10000
100 Frequency (kHz)
1000
FIGURE 2-15: Capacitive Load.
Supply Current vs.
FIGURE 2-18: Frequency.
Supply Current vs.
(c) 2006 Microchip Technology Inc.
DS22019A-page 7
MCP1406/07
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V.
-8 1.E-07
6
TJ = +125 C
o
VIN = 2.5V (MCP1407) VIN = 0V (MCP1406)
ROUT-HI ( )
5 4 3 2 1 4 6 8 10 12 14 16 18 Supply Voltage (V)
TJ = +25oC
Crossover Energy (A*sec)
7
10
1.E-08
10
-9
1.E-09 10-10
4
6
8
10
12
14
16
18
Supply Voltage (V)
FIGURE 2-19: Output Resistance (Output High) vs. Supply Voltage.
7 6
VIN = 0V (MCP1407) VIN = 2.5V (MCP1406)
FIGURE 2-21: Supply Voltage.
Crossover Energy vs.
ROUT-LO ( )
5
TJ = +125oC
4 3 2 1 4 6 8 10 12 14 16 18 Supply Voltage (V)
TJ = +25oC
FIGURE 2-20: Output Resistance (Output Low) vs. Supply Voltage.
DS22019A-page 8
(c) 2006 Microchip Technology Inc.
MCP1406/07
3.0 PIN DESCRIPTIONS
PIN FUNCTION TABLE (1)
8-Pin DFN 1 2 3 4 5 6 7 8 PAD -- 5-Pin TO-220 -- 1 -- 2 4 5 -- 3 -- TAB Symbol VDD INPUT NC GND GND OUTPUT OUTPUT VDD NC VDD Supply Input Control Input No Connection Ground Ground CMOS Push-Pull Output CMOS Push-Pull Output Supply Input Description The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
8-Pin PDIP, SOIC 1 2 3 4 5 6 7 8 -- -- Note 1:
Exposed Metal Pad Metal Tab at VDD Potential
Duplicate pins must be connected for proper operation.
3.1
Supply Input (VDD)
3.5
Exposed Metal Pad
VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with local capacitors. The bypass capacitors provide a localized lowimpedance path for the peak currents that are to be provided to the load.
The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package.
3.2
Control Input (INPUT)
3.6
TO-220 Metal Tab
The MOSFET driver input is a high-impedance, TTL/CMOS-compatible input. The input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals, and to provide noise immunity.
The metal tab on the TO-220 package is at VDD potentail. This metal tab is not intended to be the VDD connection to MCP1406/07. VDD should be supplied using the Supply Input pin of the TO-220.
3.3
Ground (GND)
Ground is the device return pin. The ground pin should have a low impedance connection to the bias supply source return. High peak currents will flow out the ground pin when the capacitive load is being discharged.
3.4
CMOS Push-Pull Output (OUTPUT)
The output is a CMOS push-pull output that is capable of sourcing peak currents of 6A (VDD = 18V). The low output impedance ensures the gate of the external MOSFET will stay in the intended state even during large transients. These output also has a reverse current latch-up rating of 1.5A.
(c) 2006 Microchip Technology Inc.
DS22019A-page 9
MCP1406/07
4.0
4.1
APPLICATION INFORMATION
General Information
VDD = 18V 1 F 0.1 F Ceramic
MOSFET drivers are high-speed, high current devices which are intended to provide high peak currents to charge the gate capacitance of external MOSFETs or IGBTs. In high frequency switching power supplies, the PWM controller may not have the drive capability to directly drive the power MOSFET. A MOSFET driver like the MCP1406/07 family can be used to provide additional drive current capability.
Input
Output CL = 2500 pF
MCP1407
4.2
MOSFET Driver Timing
+5V Input 0V 18V Output 0V 1 F 0.1 F Ceramic 10% 10% tD1 90% tD2 90% tF 10% 90%
The ability of a MOSFET driver to transition from a fully off state to a fully on state are characterized by the drivers rise time (tR), fall time (tF), and propagation delays (tD1 and tD2). The MCP1406/07 family of devices is able to make this transition very quickly. Figure 4-1 and Figure 4-2 show the test circuits and timing waveforms used to verify the MCP1406/07 timing.
VDD = 18V
tR
FIGURE 4-2: Waveform.
Non-Inverting Driver Timing
Input
Output CL = 2500 pF
MCP1406
4.3
Decoupling Capacitors
+5V Input 0V 18V Output 0V 10% tD1 90% 10%
Careful layout and decoupling capacitors are highly recommended when using MOSFET drivers. Large currents are required to charge and discharge capacitive loads quickly. For example, 2.25A are needed to charge a 2500 pF load with 18V in 20 ns. To operate the MOSFET driver over a wide frequency range with low supply impedance, a ceramic and low ESR film capacitor are recommended to be placed in parallel between the driver VDD and GND. A 1.0 F low ESR film capacitor and a 0.1 F ceramic capacitor placed between pins 1, 8 and 4, 5 should be used. These capacitors should be placed close to the driver to minimized circuit board parasitics and provide a local source for the required current.
90%
tF
tD2
tR 90% 10%
FIGURE 4-1: Waveform.
Inverting Driver Timing
4.4
PCB Layout Considerations
Proper PCB layout is important in a high current, fast switching circuit to provide proper device operation and robustness of design. PCB trace loop area and inductance should be minimized by the use of a ground plane or ground trace located under the MOSFET gate drive signals, separate analog and power grounds, and local driver decoupling.
DS22019A-page 10
(c) 2006 Microchip Technology Inc.
MCP1406/07
The MCP1406/07 devices have two pins each for VDD, OUTPUT, and GND. Both pins must be used for proper operation. This also lowers path inductance which will, along with proper decoupling, help minimize ringing in the circuit. Placing a ground plane beneath the MCP1406/07 will help as a radiated noise shield as well as providing some heat sinking for power dissipated within the device.
4.5.2
QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent current draw depends upon the state of the input pin. The MCP1406/07 devices have a quiescent current draw when the input is high of 0.13 mA (typ) and 0.035 mA (typ) when the input is low. The quiescent power dissipation is:
P Q = ( I QH x D + I QL x ( 1 - D ) ) x V DD
Where: IQH = Quiescent current in the high state D = Duty cycle IQL = Quiescent current in the low state VDD = MOSFET driver supply voltage
4.5
Power Dissipation
The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements.
P T = P L + P Q + P CC
Where: PT = Total power dissipation PL = Load power dissipation PQ = Quiescent power dissipation PCC = Operating power dissipation
4.5.3
OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the MOSFET driver output transitions because for a very short period of time both MOSFETs in the output stage are on simultaneously. This cross-conduction current leads to a power dissipation describes as:
4.5.1
CAPACITIVE LOAD DISSIPATION
Where:
The power dissipation caused by a capacitive load is a direct function of frequency, total capacitive load, and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET is:
P CC = CC x f x V DD
CC = Cross-conduction constant (A*sec) f = Switching frequency VDD = MOSFET driver supply voltage
P L = f x C T x V DD
Where: f = Switching frequency CT = Total load capacitance
2
VDD = MOSFET driver supply voltage
(c) 2006 Microchip Technology Inc.
DS22019A-page 11
MCP1406/07
5.0
5.1
PACKAGING INFORMATION
Package Marking Information (Not to Scale)
5-Lead TO-220 Example
XXXXXXXXX XXXXXXXXX YYWWNNN
MCP1406 e3 EAT^^ 0644256
8-Lead DFN
Example:
XXXXXXX XXXXXXX XXYYWW NNN
MCP1406 e3 E/MF^^ 0644 256
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP1407 e3 E/P^^256 0644
8-Lead SOIC (150 mil)
XXXXXXXX XXXXYYWW NNN
Example: MCP1406E SN^^0644 e3 256
Legend: XX...X Y YY WW NNN
e3
* Note:
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
DS22019A-page 12
(c) 2006 Microchip Technology Inc.
MCP1406/07
5-Lead Plastic Transistor Outline (AT) (TO-220)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
L
H1 Q
e1 e
e3
E
EJECTOR PIN (5) C1 J1
OP
A F D
Units Dimension Limits Lead Pitch Overall Lead Centers Space Between Leads Overall Height Overall Width Overall Length Flag Length Flag Thickness Through Hole Center Through Hole Diameter Lead Length Base to Bottom of Lead Lead Thickness Lead Width Mold Draft Angle e e1 e3 A E D H1 F Q P L J1 C1
INCHES* MIN .060 .263 .030 .160 .385 .560 .234 .045 .103 .146 .540 .090 .014 .025 3 MAX .072 .273 .040 .190 .415 .590 .258 .055 .113 .156 .560 .115 .022 .040 7
MILLIMETERS MIN 1.52 6.68 0.76 4.06 9.78 14.22 5.94 1.14 2.62 3.71 13.72 2.29 0.36 0.64 3 MAX 1.83 6.93 1.02 4.83 10.54 14.99 6.55 1.40 2.87 3.96 14.22 2.92 0.56 1.02 7
* Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254 mm) per side. JEDEC equivalent: TO-220 Drawing No. C04-036 Revised 08-01-05
(c) 2006 Microchip Technology Inc.
DS22019A-page 13
MCP1406/07
8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D N b
e N
L
K E EXPOSED PAD NOTE 1 1 2 D2 2 1 NOTE 1 E2
TOP VIEW
BOTTOM VIEW
A
A3
A1
NOTE 2
Units Dimension Limits Number of Pins N Pitch e Overall Height A Standoff A1 Contact Thickness A3 Overall Length D Overall Width E Exposed Pad Length D2 Exposed Pad Width E2 Contact Width b Contact Length L Contact-to-Exposed Pad K
MIN
0.80 0.00
3.90 2.20 0.35 0.50 0.20
MILLIMETERS NOM 8 1.27 BSC 0.85 0.01 0.20 REF 5.00 BSC 6.00 BSC 4.00 2.30 0.40 0.60 --
MAX
1.00 0.05
4.10 2.40 0.48 0.75 --
Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Significant Characteristic 4. Package is saw singulated 5. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04-122, Sept. 8, 2006
DS22019A-page 14
(c) 2006 Microchip Technology Inc.
MCP1406/07
8-Lead Plastic Dual In-line (PA) - 300 mil Body (PDIP)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
MAX Number of Pins Pitch Top to Seating Plane A .140 .170 4.32 Molded Package Thickness A2 .115 .145 3.68 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 8.26 Molded Package Width .240 .250 .260 6.60 E1 Overall Length D .360 .373 .385 9.78 Tip to Seating Plane L .125 .130 .135 3.43 c Lead Thickness .008 .012 .015 0.38 Upper Lead Width B1 .045 .058 .070 1.78 Lower Lead Width B .014 .018 .022 0.56 eB Overall Row Spacing .310 .370 .430 10.92 Mold Draft Angle Top 5 10 15 15 Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
Units Dimension Limits n p
MIN
INCHES* NOM 8 .100 .155 .130
MAX
MIN
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
(c) 2006 Microchip Technology Inc.
DS22019A-page 15
MCP1406/07
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil Body (SOIC)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
E E1
p D 2 B n 1
h 45
c A
A2
L A1
MAX Number of Pins Pitch Overall Height A .053 .069 1.75 Molded Package Thickness A2 .052 .061 1.55 Standoff A1 .004 .010 0.25 Overall Width E .228 .244 6.20 Molded Package Width E1 .146 .157 3.99 Overall Length D .189 .197 5.00 Chamfer Distance h .010 .020 0.51 Foot Length L .019 .030 0.76 Foot Angle 0 8 8 c Lead Thickness .008 .010 0.25 Lead Width B .013 .020 0.51 Mold Draft Angle Top 0 15 15 Mold Draft Angle Bottom 0 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
Units Dimension Limits n p
MIN
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
DS22019A-page 16
(c) 2006 Microchip Technology Inc.
MCP1406/07
APPENDIX A: REVISION HISTORY
Revision A (December 2006)
* Original Release of this Document.
(c) 2006 Microchip Technology Inc.
DS22019A-page 17
MCP1406/07
NOTES:
DS22019A-page 18
(c) 2006 Microchip Technology Inc.
MCP1406/07
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range XX Package XXX Tape & Reel Examples:
a) MCP1406-E/MF: 6A High-Speed MOSFET Driver, Inverting 8LD DFN package. MCP1406-E/AT: 6A High-Speed MOSFET Driver, Inverting 5LD TO-220 package. MCP1406-E/SN: 6A High-Speed MOSFET Driver, Inverting 8LD SOIC package. MCP1406-E/P: 6A High-Speed MOSFET Driver, Inverting 8LD PDIP package. MCP1406T-E/MF: Tape and Reel, 6A High-Speed MOSFET Driver, Inverting, 8LD DFN pkg. MCP1406T-E/SN: Tape and Reel, 6A High-Speed MOSFET Driver, Inverting, 8LD SOIC pkg. MCP1407-E/MF: 6A High-Speed MOSFET Driver, Non-Inverting 8LD DFN package. MCP1407-E/AT: 6A High-Speed MOSFET Driver, Non-Inverting 5LD TO-220 package. MCP1407-E/SN: 6A High-Speed MOSFET Driver, Non-Inverting 8LD SOIC package. MCP1407-E/P: 6A High-Speed MOSFET Driver, Non-Inverting 8LD PDIP package. MCP1407T-E/MF: Tape and Reel, 6A High-Speed MOSFET Driver, Non-Inverting, 8LD DFN pkg. MCP1407T-E/SN: Tape and Reel, 6A High-Speed MOSFET Driver, Non-Inverting, 8LD SOIC pkg.
b)
Device: MCP1406: 6A High-Speed MOSFET Driver, Inverting MCP1406T: 6A High-Speed MOSFET Driver, Inverting (Tape and Reel) MCP1407: 6A High-Speed MOSFET Driver, Non-Inverting MCP1407T: 6A High-Speed MOSFET Driver, Non-Inverting (Tape and Reel) E AT MF PA SN = = = = = -40C to +125C TO-220, 5-Lead Dual, Flat, No-Lead (6x5 mm Body), 8-lead Plastic DIP, (300 mil body), 8-lead Plastic SOIC (150 mil Body), 8-Lead
c)
d)
Temperature Range: Package: *
e)
f)
* All package offerings are Pb Free (Lead Free)
a)
b)
c)
d)
e)
f)
(c) 2006 Microchip Technology Inc.
DS22019A-page 19
MCP1406/07
NOTES:
DS22019A-page 20
(c) 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2006 Microchip Technology Inc.
DS22019A-page 21
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
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EUROPE
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12/08/06
DS22019A-page 22
(c) 2006 Microchip Technology Inc.

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